Design lets chip manage local memory stores efficiently
using an Internet-style communication network.
The more cores — or processing units — a computer chip has,
the bigger the problem of communication between cores becomes. For years,
Li-Shiuan Peh, the Singapore Research Professor of Electrical Engineering and
Computer Science at MIT, has argued that the massively multicore chips of the
future will need to resemble little Internets, where each core has an
associated router, and data travels between cores in packets of fixed size.